課程大綱： 1. Introduction to VLSI Signal Processing 2. Pipelining and Retiming 3. Folding and Parallel Processing 4. Programmable/Configurable DSP Architecture 5. FIR Filter, Filter Bank, and Multirate Signal Processing 6. Algorithm Strength Reduction and DSP Arithmetic LAB操作項目： 1. Coding Environment 2. Programmable Computing Engine for FIR Filter / Filter Bank 3. Efficient CSD Constant Multiplier for FIR Filtering 4. FPGA Prototyping
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